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Bezpečnost a spolehlivost hardwaru

This module explores hardware security and reliability, focusing on the physical aspects of security in computing devices. It covers the vulnerabilities inherent in hardware components, techniques for hardware-based security, and strategies to ensure hardware reliability.

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Tvůrce učebních osnov

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Lipp, Moritz, Michael Schwarz, Daniel Gruss, Thomas Prescher, Werner Haas, Jann Horn, Stefan Mangard, et al. “Meltdown: Reading Kernel Memory from User Space.” Communications of the ACM 63, no. 6 (May 21, 2020): 46–56.

https://doi.org/10.1145/3357033

Kocher, Paul, Jann Horn, Anders Fogh, Daniel Genkin, Daniel Gruss, Werner Haas, Mike Hamburg, et al. “Spectre Attacks: Exploiting Speculative Execution.” In 2019 IEEE Symposium on Security and Privacy (SP). San Francisco, CA, USA: IEEE, 2019.

https://doi.org/10.1109/SP.2019.00002

Hill, Mark D., Jon Masters, Parthasarathy Ranganathan, Paul Turner, and John L. Hennessy. “On the Spectre and Meltdown Processor Security Vulnerabilities.” IEEE Micro 39, no. 2 (February 2019): 9–19.

https://doi.org/10.1109/MM.2019.2897677

Patterson, David A., and John L. Hennessy. Computer Organization and Design: The Hardware / Software Interface. 1st ed., RISC-V Edition. Morgan Kaufmann Pub, 2017.

Dally, William J., and R. Curtis Harting. Digital Design: A Systems Approach. Illustrated Edition. Cambridge University Press, 2012.

Swaminathan, Karthik, Nandhini Chandramoorthy, Chen-Yong Cher, Ramon Bertran, Alper Buyuktosunoglu, and Pradip Bose. “BRAVO: Balanced Reliability-Aware Voltage Optimization.” In 2017 IEEE International Symposium on High Performance Computer Architecture (HPCA), 97–108. IEEE, 2017.

https://doi.org/10.1109/HPCA.2017.56

Dixit, Harish Dattatraya, Laura Boyle, Gautham Vunnam, Sneha Pendharkar, Matt Beadon, and Sriram Sankar. “Detecting Silent Data Corruptions in the Wild.” arXiv, March 16, 2022.

https://doi.org/10.48550/arXiv.2203.08989

Papadimitriou, George, and Dimitris Gizopoulos. “Demystifying the System Vulnerability Stack: Transient Fault Effects Across the Layers.” In 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA), 902–15. Valencia, Spain: IEEE, 2021.

https://doi.org/10.1109/ISCA52012.2021.00075

Leng, Jingwen, Alper Buyuktosunoglu, Ramon Bertran, Pradip Bose, Quan Chen, Minyi Guo, and Vijay Janapa Reddi. “Asymmetric Resilience: Exploiting Task-Level Idempotency for Transient Error Recovery in Accelerator-Based Systems.” In 2020 IEEE International Symposium on High Performance Computer Architecture (HPCA), 44–57. IEEE, 2020.

https://doi.org/10.1109/HPCA47549.2020.00014

Nomura, Shuou, Matthew D. Sinclair, Chen-Han Ho, Venkatraman Govindaraju, Marc de Kruijf, and Karthikeyan Sankaralingam. “Sampling + DMR: Practical and Low-Overhead Permanent Fault Detection.” In 2011 38th Annual International Symposium on Computer Architecture (ISCA), 201–12. IEEE, 2011.

https://doi.org/10.1145/2000064.2000089

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Apply for: Lipp, Moritz, Michael Schwarz, Daniel Gruss, Thomas Prescher, Werner Haas, Jann Horn, Stefan Mangard, et al. “Meltdown: Reading Kernel Memory from User Space.” Communications of the ACM 63, no. 6 (May 21, 2020): 46–56.

Lipp, Moritz, Michael Schwarz, Daniel Gruss, Thomas Prescher, Werner Haas, Jann Horn, Stefan Mangard, et al. “Meltdown: Reading Kernel Memory from User Space.” Communications of the ACM 63, no. 6 (May 21, 2020): 46–56.

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